FAULT-TOLERANT SCHEMES FOR PARALLEL ARCHITECTURES

被引:1
作者
LIVESEY, MJ
OWCZARCZYK, J
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D O I
10.1049/el:19870839
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
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页码:1206 / 1207
页数:2
相关论文
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