SIDEWALL GATE CONTROLLED DIODE FOR THE MEASUREMENT OF SILICON SELECTIVE EPITAXIAL GROWTH-SIO2 INTERFACE DEFECTS

被引：6
|
作者：
KLAASEN, WA
NEUDECK, GW
机构：
[1] School of Engineering, Purdue University, West, Lafayette, IN
来源：
IEEE TRANSACTIONS ON ELECTRON DEVICES | 1990年 / 37卷 / 01期
关键词：
D O I：
10.1109/16.43825
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
The sidewall gate controlled diode (SGCD) was fabricated as a new device structure for the measurement and evaluation of electrical defects near the unique vertical silicon-SiO2 sidewall interface associated with low-temperature low-pressure silicon selective epitaxial growth (SEG) technologies. SGCD devices were fabricated and tested to demonstrate their value for measuring the SEG sidewall interface and near interface electrical characteristics. © 1990 IEEE
引用
收藏
页码：273 / 279
页数：7
相关论文
共 50 条
  • [1] Characterization of sidewall defects in selective epitaxial growth of silicon
    Bashir, R.
    Neudeck, G.W.
    Haw, Y.
    Kvam, E.P.
    Denton, J.P.
    Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures, 1995, 13 (03): : 923 - 927
  • [2] Characterization and modelling of sidewall defects in selective epitaxial growth of silicon
    Bashir, R.
    Neudeck, G.W.
    Haw, Y.
    Kvam, E.P.
    Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures, 1995, 13 (03): : 928 - 935
  • [3] CHARACTERIZATION OF SIDEWALL DEFECTS IN SELECTIVE EPITAXIAL-GROWTH OF SILICON
    BASHIR, R
    NEUDECK, GW
    HAW, Y
    KVAM, EP
    DENTON, JP
    JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 1995, 13 (03): : 923 - 927
  • [4] CHARACTERIZATION AND MODELING OF SIDEWALL DEFECTS IN SELECTIVE EPITAXIAL-GROWTH OF SILICON
    BASHIR, R
    NEUDECK, GW
    HAW, Y
    KVAM, EP
    JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 1995, 13 (03): : 928 - 935
  • [5] Elimination of the sidewall defects in selective epitaxial growth (SEG) of silicon for a dielectric isolation technology
    Intel Corp, Albuquerque, United States
    IEEE Electron Device Lett, 6 (267-269):
  • [6] Elimination of the sidewall defects in selective epitaxial growth (SEG) of silicon for a dielectric isolation technology
    Sherman, JM
    Neudeck, GW
    Denton, JP
    Bashir, R
    Fultz, WW
    IEEE ELECTRON DEVICE LETTERS, 1996, 17 (06) : 267 - 269
  • [7] Silicon selective epitaxial growth and electrical properties of epi/sidewall interfaces
    Ishitani, Akihiko, 1600, (28):
  • [8] Selective epitaxial growth of silicon for vertical diode application
    Samsung Electronics Co., Ltd., Yongin, Kyounggi-do 446-711, Korea, Republic of
    不详
    Jpn. J. Appl. Phys., 8 PART 2
  • [9] Selective Epitaxial Growth of Silicon for Vertical Diode Application
    Lee, Kong-Soo
    Yoo, Dae-Han
    Han, Jae-Jong
    Hyung, Yong-Woo
    Kim, Seok-Sik
    Kang, Chang-Jin
    Jeong, Hong-Sik
    Moon, Joo-Tae
    Park, Hyunho
    Jeong, Hanwook
    Kim, Kwang-Ryul
    Choi, Byoungdeog
    JAPANESE JOURNAL OF APPLIED PHYSICS, 2010, 49 (08)
  • [10] SILICON SELECTIVE EPITAXIAL-GROWTH AND ELECTRICAL-PROPERTIES OF EPI/SIDEWALL INTERFACES
    ISHITANI, A
    KITAJIMA, H
    ENDO, N
    KASAI, N
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 1989, 28 (05): : 841 - 848
12345