A HIGH-DENSITY, SELF-ALIGNED POWER MOSFET STRUCTURE FABRICATED USING SACRIFICIAL SPACER TECHNOLOGY

被引：6

作者：

SHENAI, K ^{[1
]}

机构：

[1] GE,CTR RES & DEV,SCHENECTADY,NY 12301

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 1992年 / 39卷 / 05期

关键词：

D O I：

10.1109/16.129119

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A novel power MOSFET structure fabricated using the sacrificial spacer technology is described. Anisotropically etched side-wall oxide spacers were used to implement self-aligned shallow p+ surface diffused regions to reduce the p-base sheet resistance and its contact resistance. Vertical power DMOSFET's with V(DB) = 150 V and R(sp) = 9.7 m-OMEGA.cm2 were fabricated using this technology where V(DB) is the drain-source avalanche breakdown voltage and R(sp) is the specific on-state resistance. The measured on-state resistance performance is a factor of 4 x smaller compared to commercially available power MOSFET's in the 150-V reverse blocking range.

引用

页码：1252 / 1255

页数：4

共 14 条

[1]

BALIGA BJ, 1984, IEEE ELECTR DEVICE L, V5, P323, DOI 10.1109/EDL.1984.25932

[2]

BALIGA BJ, 1987, MODERN POWER DEVICES

[3]

Mori M., 1988, International Electron Devices Meeting. Technical Digest (IEEE Cat. No.88CH2528-8), P813, DOI 10.1109/IEDM.1988.32935

[4]

Nakagawa A., 1986, International Electron Devices Meeting 1986. Technical Digest (Cat. No.86CH2381-2), P122