NO 1 ESS APPARATUS + EQUIPMENT

被引：8
作者：
FERGUSON, JG
WETHERELL, DH
SKINNER, RS
GRUTZNER, WE
SKUBIAK, MT
KOEHLER, DC
机构：
来源：
BELL SYSTEM TECHNICAL JOURNAL | 1964年 / 43卷 / 5P2期
关键词：
D O I：
10.1002/j.1538-7305.1964.tb04128.x
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：2355 / +
相关论文
共 11 条
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BELL SYSTEM TECHNICAL JOURNAL, 1964, 43 (5P1) :2097-+
[2]   NO I ESS LOGIC CIRCUITS + THEIR APPLICATION TO DESIGN OF CENTRAL CONTROL [J].
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[3]   NO 1 ESS CIRCUIT PACKS + CONNECTORS [J].
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BELL SYSTEM TECHNICAL JOURNAL, 1964, 43 (5P2) :2441-+
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[5]   NO I ESS MAINTENANCE PLAN [J].
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[6]   NO 1 ESS CALL STORE - A 0.2-MEGABIT FERRITE SHEET MEMORY [J].
GENKE, RM ;
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BELL SYSTEM TECHNICAL JOURNAL, 1964, 43 (5P1) :2147-+
[7]   ORGANIZATION OF NO 1 ESS CENTRAL PROCESSOR [J].
HARR, JA ;
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BELL SYSTEM TECHNICAL JOURNAL, 1964, 43 (5P1) :1845-+
[8]   NO 1 ESS - SYSTEM ORGANIZATION + OBJECTIVES [J].
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BELL SYSTEM TECHNICAL JOURNAL, 1964, 43 (5P1) :1831-+
[9]  
NEUMILLER EG, 1962, BELL LABORATORIES RE, V40, P402
[10]  
PFERD W, 1962, BELL LABORATORIES RE, V40, P202
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