Phase Shifted Carrier Pulse Width Modulation for Three Phase Multilevel Inverter to Minimize THD and Enhance Output Voltage Performance

被引:0
作者
Palanivel, P. [1 ]
Dash, Subhransu Sekher [1 ]
机构
[1] SRM Univ, Power Elect Lab, Chennai, Tamil Nadu, India
关键词
Phase shifted pulse width modulation; Switching frequency optimal pulse width modulation; Total harmonic distortion; Output voltage; Cascaded Multilevel inverter;
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents, a phase shifted carrier pulse width modulation is proposed, which can minimize the output total harmonic distortion and enhances the output voltages from five level inverter to multilevel topologies. Multilevel inverters are important for power electronics applications such as flexible ac transmission systems, renewable energy sources, uninterruptible power supplies and active power filters. Two novel methodologies adopting the phase shifted carrier pulse width modulation concept are proposed in this paper. The phase shifted carrier pulse width modulation cascaded multilevel inverter strategy minimized output total harmonic distortion and phase shifted carrier switching frequency optimal pulse width modulation cascaded multilevel inverters strategy enhances the output voltages. Field programmable gate array has been chosen to implement the pulse width modulation due its fast proto typing, simple hardware and software design. Simulation and Experimental results are provided.
引用
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页码:1 / 13
页数:13
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