AN INVESTIGATION OF THE INCONSISTENCY IN BARRIER HEIGHTS FOR PNP AND NPN POLYSILICON EMITTER BIPOLAR-TRANSISTORS USING A NEW TUNNELING MODEL

A new tunneling model is proposed for polysilicon emitter bipolar transistors in which the interfacial layer is modeled as a wide band-gap semiconductor. This model predicts that potential barriers are formed in both the conduction and valence bands. The shapes and sizes of the barriers are dependent upon the amount of band-bending within the interfacial layer, which is in turn dependent on the amount of dopant segregation in the interfacial layer. Measurements of base current and emitter resistance are made on pnp polysilicon emitter bipolar transistors with deliberately grown interfacial oxide layers. These electrical characteristics are then modeled using the new heterojunction tunneling model, from which values of electron and hole barrier heights are extracted. Specifically, a hole barrier height of 0. 31 +/- 0.02 eV is obtained, and an electron barrier height of either > 0. 68 +/- 0.08 eV or > 0.44 +/- 0.06 eV, with the value depending on the band-gap narrowing model used in the calculation. These values of electron and hole barrier height are shown to be different than the values obtained when similar measurements are made on npn devices. The new heterojunction tunneling model is used to model these devices, and it is shown that it is capable of fully explaining this discrepancy between the values of barrier height obtained from measurements on npn and pnp transistors.