A NEW REALIZATION FOR MULTIPROCESSOR IMPLEMENTATION OF 2-D DENOMINATOR-SEPARABLE DIGITAL-FILTERS FOR REAL-TIME PROCESSING

被引：1

作者：

RAGHURAMIREDDY, D

UNBEHAUEN, R

机构：

[1] Lehrstuhl fur Allgemeine und Theoretische Elektrotechnik, D-8520, Erlangen

[2] S. V. University college of Engineering, Tirupati

[3] Lehrstuhl fur Allgemeine und Theoretische Elektrotechnik, D-8520, Erlangen

来源：

IEEE TRANSACTIONS ON SIGNAL PROCESSING | 1992年 / 40卷 / 09期

关键词：

D O I：

10.1109/78.157275

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this correspondence, an efficient multiprocessor implementation of 2-D denominator-separable digital filters for real-time processing is presented. The realization is derived minimizing the throughput delay and maximizing the parallelism using the basic primitive structure of Dabbagh and Alexander [4]. The proposed realization is as good and efficient as the realizations of [4] for the implementation of symmetric fan filters. It is shown that in special cases, the proposed realization may be more efficient.

引用

页码：2349 / 2353

页数：5

共 9 条

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