DEFECT ANALYSIS AND YIELD DEGRADATION OF INTEGRATED-CIRCUITS

被引：39

作者：

GUPTA, A

PORTER, WA

LATHROP, JW

机构：

[1] ROCKWELL INT,MICROELECTR DIV,ANAHEIM,CA 91800

[2] TEXAS A&M UNIV,DEPT ELECT ENGN,COLLEGE STN,TX 77843

[3] CLEMSON UNIV,DEPT ELECT & COMP,CLEMSON,SC 29631

来源：

关键词：

D O I：

10.1109/JSSC.1974.1050475

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

引用

页码：96 / 103

页数：8

共 28 条

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[2]

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[3]

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[4]

CALHOUN DF, 1972, IEEE J SOLID-ST CIRC, VSC 7, P395

[5]

DINGWALL AGF, 1968, OCT IEEE INT EL DEV

[6] STUDIES ON SURFACE PREPARATION [J].

FAUST, JW .

[7]

FISHER AW, 1966, J ELECTROCHEM SOC, V113, P1054

[8]

Gupta A., 1970, Proceedings of the IEEE, V58, P1960, DOI 10.1109/PROC.1970.8073

[9]

GUPTA A, 1972, IEEE J SOLID ST CIRC, VSC 7, P389

[10] SILICON INSULATED-GATE FIELD-EFFECT TRANSISTOR [J].

HOFSTEIN, SR ;

HEIMAN, FP .