A VLSI system for neural Bayesian and LVQ classification

被引:0
作者
Thissen, P [1 ]
Verleysen, M [1 ]
Legat, JD [1 ]
Madrenas, J [1 ]
Dominguez, J [1 ]
机构
[1] UNIV POLITECN CATALUNYA,DEPT ELECTR ENGN,E-08071 BARCELONA,SPAIN
来源
FROM NATURAL TO ARTIFICIAL NEURAL COMPUTATION | 1995年 / 930卷
关键词
D O I
暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
Various types of neural networks ma! be used in multi-dimensional classification tasks; among them, Bayesian and LVQ algorithms are interesting respectively for their performances and their simplicity of operations, The large number of operations involved in such algorithms may however be incompatible with on-line applications or with the necessity of portable small size systems. This paper describes a neural network classifier system based on a fully analog operative chip coupled with a digital control system, The chip implements sub-optimal Bayesian classifier and LVQ algorithms.
引用
收藏
页码:696 / 703
页数:8
相关论文
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