Hysteresis Characteristics in Low Temperature Poly-Si Thin Film Transistors

被引：8
|
作者：
Chung, Hoon-Ju [1 ,3 ]
Kim, Dae-Hwan [2 ]
Kim, Byeong-Koo [2 ,3 ]
机构：
[1] Kumoh Natl Inst Technol, Sch Elect Engn, 1,Yangho Dong, Gumi 730701, Gyeongbuk, South Korea
[2] LG Philips LCD Co Ltd, PSi Proc Integrat Team, Gumi 730726, Gyeongbuk, South Korea
[3] KIDS, London, England
来源：
JOURNAL OF INFORMATION DISPLAY | 2005年 / 6卷 / 04期
关键词：
thin film transistor; poly-Si; hysteresis; AMOLED; residual image;
D O I：
10.1080/15980316.2005.9651984
中图分类号：
T [工业技术];
学科分类号：
08 ;
摘要：
The dependence of hysteresis characteristics in low temperature poly-Si (LTPS) thin film transistors (TFTs) on the gatesource voltage (Vgs) or the drain-source voltage (Vds) bias is investigated and discussed. The hysteresis levels in both p-type and n-type LTPS TFTs are independent of Vds bias but increase as the sweep range of Vgs increases. It has been found that the hysteresis in both p-type and n-type LTPS TFTs originated from charge trapping and de-trapping in the channel region rather than at the source/drain edges.
引用
收藏
页码：6 / 10
页数：5
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