FERROELECTRIC MEMORY FET WITH IR/IRO2 ELECTRODES

被引:43
|
作者
NAKAMURA, T
NAKAO, Y
KAMISAWA, A
TAKASU, H
机构
[1] ROHM CO.,LTD. 21, Saiin Mizosaki-cho, Kyoto 615, Ukyo-ku
关键词
D O I
10.1080/10584589508012922
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We proposed a MFMIS structure having a floating gate as a bottom electrode between a ferroelectric thin film and the gate SiO2. Conventional gate SiO2 call be used and ferroelectric thin films call be grown on bottom electrodes which have a good matching with the ferroelectric materials due to adopt the MFMIS structure. Ir and IrO2 on poly-Si were used as floating gate. When a IrO2 layer was formed between PZT and poly-Si, a high-quality PZT thin film was obtained and the PZT films show no fatigue up to 10(12) cycles of switching pulses. From the I-D-V-G characteristics measurement for 1.2 mu m P-ch MFMIS FET, the shift in V-th or the memory window for a bias sweep of +/- 15V was about 3.3V. The difference of I-D-V-D curves which corresponded to I-D-V-G characteristics were found between before and after a programming pulse was applied.
引用
收藏
页码:179 / 187
页数:9
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