Design of A high performance low-power consumption discrete time Second order Sigma-Delta modulator used for Analog to Digital Converter

被引：0

作者：

Laajimi, Radwene ^{[1
]}

Masmoudi, Mohamed ^{[1
]}

机构：

[1] Univ Sfax, Elect Microtechnol & Commun EMC Res Grp, Sfax ENIS, Sfax 3038, Tunisia

来源：

INTERNATIONAL JOURNAL OF ADVANCED COMPUTER SCIENCE AND APPLICATIONS | 2012年 / 3卷 / 11期

关键词：

CMOS technology; Analog-to-Digital conversion; Low power electronics; Sigma-Delta modulation; switched-capacitor circuits; transconductance operational amplifier;

D O I：

暂无

中图分类号：

TP301 [理论、方法];

学科分类号：

081202 ;

摘要：

This paper presents the design and simulations results of a switched-capacitor discrete time Second order Sigma-Delta modulator used for a resolution of 14 bits Sigma-Delta analog to digital converter. The use of operational amplifier is necessary for low power consumption, it is designed to provide large bandwidth and moderate DC gain. With 0.35 mu m CMOS technology, the Sigma Delta modulator achieves 86 dB dynamic range, and 85 dB signal to noise ratio (SNR) over an 80 KHz signal bandwidth with an oversampling ratio (OSR) of 88, while dissipating 9.8mW at +/- 1.5V supply voltage.

引用

页码：108 / 114

页数：7

共 19 条

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