A strained Si-channel NMOSFET with low field mobility enhancement of about 140% using a SiGe virtual substrate

被引:1
作者
Cui Wei [1 ,2 ]
Tang Zhaohuan [2 ]
Tan Kaizhou [2 ]
Zhang Jing [2 ]
Zhong Yi [2 ]
Hu Huiyong [3 ]
Xu Shiliu [2 ]
Li Ping [1 ]
Hu Gangyi [2 ]
机构
[1] UESTC, State Key Lab Elect Thin Films & Integrated Devic, Chengdu 610023, Sichuan, Peoples R China
[2] Sci & Technol Analog Integrated Circuit Lab, Chongqing 400060, Peoples R China
[3] Xidian Univ, Minist Educ Wide Band Gap Semicond Mat & Devices, Microelect Sch, Key Lab, Xian 710071, Shaanxi, Peoples R China
关键词
CMOS inverter; strained Si; mobility enhancement; SiGe virtual substrate; relaxed layer;
D O I
10.1088/1674-4926/33/9/094005
中图分类号
O469 [凝聚态物理学];
学科分类号
070205 ;
摘要
A fully standard CMOS integrated strained Si-channel NMOSFET has been demonstrated. By adjusting the thickness of graded SiGe, modifying the channel doping concentration, changing the Ge fraction of the relaxed SiGe layer and forming a p-well by multiple implantation technology, a surface strained Si-channel NMOSFET was fabricated, of which the low field mobility was enhanced by 140%, compared with the bulk-Si control device. Strained NMOSFET and PMOSFET were used to fabricate a strained CMOS inverter based on a SiGe virtual substrate. Test results indicated that the strained CMOS converter had a drain leakage current much lower than the Si devices, and the device exhibited wonderful on/off-state voltage transmission characteristics.
引用
收藏
页数:4
相关论文
共 8 条
[1]  
Li Xiaojian, 2008, J SEMICONDUCTORS, V29, P865
[2]  
Liang Renrong, 2007, Chinese Journal of Semiconductors, V28, P1518
[3]   High-performance nMOSFETs using a novel strained Si/SiGe CMOS architecture [J].
Olsen, SH ;
O'Neill, AG ;
Driscoll, LS ;
Kwa, KSK ;
Chattopadhyay, S ;
Waite, AM ;
Tang, YT ;
Evans, AGR ;
Norris, DJ ;
Cullis, AG ;
Paul, DJ ;
Robbins, DJ .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2003, 50 (09) :1961-1969
[4]   Strained SiNMOSFETs for high performance CMOS technology [J].
Rim, K ;
Koester, S ;
Hargrove, M ;
Chu, J ;
Mooney, PM ;
Ott, J ;
Kanarsky, T ;
Ronsheim, P ;
Ieong, M ;
Grill, A ;
Wong, HSP .
2001 SYMPOSIUM ON VLSI TECHNOLOGY, DIGEST OF TECHNICAL PAPERS, 2001, :59-60
[5]   Fabrication and analysis of deep submicron strained-Si N-MOSFET's [J].
Rim, KK ;
Hoyt, JL ;
Gibbons, JF .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 2000, 47 (07) :1406-1415
[6]  
[张侃 ZHANG Kan], 2007, [固体电子学研究与进展, Research & Progress of Solid State Electronics], V27, P436
[7]  
[张庆东 ZHANG Qingdong], 2009, [固体电子学研究与进展, Research & Progress of Solid State Electronics], V29, P175
[8]  
Zhang Xuefeng, 2006, Chinese Journal of Semiconductors, V27, P2000