PARALLEL PROCESSING FOR VITERBI ALGORITHM

[1] CHANG CY, 1985, 23RD P ANN ALL C COM, P430

[2] LOCALLY CONNECTED VLSI ARCHITECTURES FOR THE VITERBI ALGORITHM [J]. IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS, 1988, 6 (03) : 527 - 537

[3] GULAK PG, 1986, IEEE J SELECT AREAS, V4

[4] Horowitz E., 1978, FUNDAMENTALS COMPUTE

[5] KUNG SY, 1988, VLSI ARRAY PROCESSOR, P216

[6] MEAD C, 1980, INTRO VLSI SYSTEMS, P293

[7] REED IS, 1986, IEEE T C, V35, P742

[8] VITERBI AJ, 1979, PRINCIPLES DIGITAL C

[1] CHANG CY, 1985, 23RD P ANN ALL C COM, P430

[2] LOCALLY CONNECTED VLSI ARCHITECTURES FOR THE VITERBI ALGORITHM [J]. IEEE JOURNAL ON SELECTED AREAS IN COMMUNICATIONS, 1988, 6 (03) : 527 - 537

[3] GULAK PG, 1986, IEEE J SELECT AREAS, V4

[4] Horowitz E., 1978, FUNDAMENTALS COMPUTE

[5] KUNG SY, 1988, VLSI ARRAY PROCESSOR, P216

[6] MEAD C, 1980, INTRO VLSI SYSTEMS, P293

[7] REED IS, 1986, IEEE T C, V35, P742

[8] VITERBI AJ, 1979, PRINCIPLES DIGITAL C