A dual redundancy radiation-hardened flip-flop based on a C-element in a 65 nm process

被引：1

作者：

Chen Gang ^{[1
,2
]}

Gao Bo ^{[1
,2
]}

Gong Min ^{[1
,2
]}

机构：

[1] Sichuan Univ, Sch Phys Sci & Technol, Chengdu 610064, Sichuan, Peoples R China

[2] Microelect Technol Key Lab Sichuan Prov, Chengdu 610064, Sichuan, Peoples R China

来源：

JOURNAL OF SEMICONDUCTORS | 2013年 / 34卷 / 09期

关键词：

single event effect; radiation hardening by design; triple modular redundancy flip-flop; C-element;

D O I：

10.1088/1674-4926/34/9/095012

中图分类号：

O469 [凝聚态物理学];

学科分类号：

070205 ;

摘要：

A radiation-hardened flip-flop is proposed to mitigate the single event upset (SEU) effect. Immunity was achieved through the use of C-elements and redundant storage elements. It takes advantage of the property of a C-element in which it enters a high impedance mode when its inputs are of different logic values. Redundant storage nodes are then used to drive the C-elements so that a single upset pulse in any storage will be prevented from altering the state of the output of the flip-flop. The flip-flop was implemented using 48 transistors and occupied an area of 30.78 mu m(2), using 65 nm CMOS process. It consumed 22.6% fewer transistors as compared to the traditional SEU resilient TMR flip-flop.

引用

页数：4