DUAL-PORT RAM IN CMOS STORES 256 BYTES

被引：0
|
作者：
BURSKY, D
机构：
来源：
ELECTRONIC DESIGN | 1984年 / 32卷 / 02期
关键词：
D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
收藏
页码：194 / 194
页数：1
相关论文
共 50 条
  • [21] Design of Intelligent CAN Communication PCI Card Based on Dual-Port RAM
    Song Zhifeng
    Mei Shunqi
    2009 ISECS INTERNATIONAL COLLOQUIUM ON COMPUTING, COMMUNICATION, CONTROL, AND MANAGEMENT, VOL I, 2009, : 217 - 220
  • [22] TFET/CMOS Hybrid Pseudo Dual-Port SRAM for Scratchpad Applications
    Gupta, N.
    Makosiej, A.
    Thomas, O.
    Amara, A.
    Vladimirescu, A.
    Anghel, C.
    2015 JOINT INTERNATIONAL EUROSOI WORKSHOP AND INTERNATIONAL CONFERENCE ON ULTIMATE INTEGRATION ON SILICON (EUROSOI-ULIS), 2015, : 209 - 212
  • [23] DUAL-PORT RAM UNITES 8-BIT AND 16-BIT SYSTEMS
    BURSKY, D
    ELECTRONIC DESIGN, 1986, 34 (19) : 79 - 80
  • [24] LOW-COST, DUAL-PORT RAM DESIGN DELIVERS HIGH-PERFORMANCE
    NAQVI, S
    EDN MAGAZINE-ELECTRICAL DESIGN NEWS, 1985, 30 (02): : 155 - &
  • [25] Pseudo-ring testing scheme of word-oriented dual-port RAM
    Bodean, Ghenadie
    OPTIM 2004: PROCEEDINGS OF THE 9TH INTERNATIONAL CONFERENCE ON OPTIMIZATION OF ELECTRICAL AND ELECTRONIC EQUIPMENT, VOL 4: APPLIED ELECTRONICS, ELECTRICAL ENGINEERING EDUCATION, 2004, : 47 - 52
  • [26] Low-power dual-port asynchronous CMOS SRAM design techniques
    Soon-Hwei, Tan
    Poh-Yee, Loh
    Sulaiman, Mohd-Shahiman
    Yusoff, Zubaida
    INFORMACIJE MIDEM-JOURNAL OF MICROELECTRONICS ELECTRONIC COMPONENTS AND MATERIALS, 2007, 37 (02): : 87 - 93
  • [27] An Interface Design of Communication Between PC104 and DSP Based on Dual-Port RAM
    Li Bo
    Liu Qingjian
    Qiao Zhifeng
    Dong Jingchuan
    Liu Qing
    FUNCTIONAL MANUFACTURING AND MECHANICAL DYNAMICS II, 2012, 141 : 198 - 202
  • [28] AVOIDING DEADLOCK WITH A DUAL-PORT MEMORY
    KRZYZAGORSKI, P
    MICROPROCESSING AND MICROPROGRAMMING, 1989, 25 (1-5): : 139 - 142
  • [29] DUAL-PORT DRAM ACCELERATES WINDOWS
    BURSKY, D
    ELECTRONIC DESIGN, 1993, 41 (22) : 43 - &
  • [30] Dual-port memory with reconfigurable structure
    Antchev, G
    Gigi, D
    PROCEEDINGS OF THE FIFTH WORKSHOP ON ELECTRONICS FOR LHC EXPERIMENTS, 1999, : 348 - 351
12345