REAL-TIME PROGRAMMABLE PARALLEL DIGITAL SIGNAL PROCESSOR ARCHITECTURE

被引：0
|
作者：
BARR, PC
BRESSEL, JG
HARRIS, JD
VALAS, CJ
机构：
来源：
CA-DSP 89, VOLS 1 AND 2: 1989 INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE AND DIGITAL SIGNAL PROCESSING | 1989年
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D O I：
暂无
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
引用
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页码：558 / 562
页数：5
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