A high voltage Bi-CMOS compatible buffer super-junction LDMOS with an N-type buried layer

被引：2

作者：

Wu Wei ^{[1
]}

Zhang Bo ^{[1
]}

Fang Jian ^{[1
]}

Luo Xiaorong ^{[1
]}

Li Zhaoji ^{[1
]}

机构：

[1] Univ Elect Sci & Technol China, State Key Lab Elect Thin Films & Integrated Devic, Chengdu 610054, Sichuan, Peoples R China

来源：

JOURNAL OF SEMICONDUCTORS | 2014年 / 35卷 / 01期

基金：

中国国家自然科学基金;

关键词：

N-type buried layer; breakdown voltage; electric field modulation; lateral double-diffusion MOSFET; super-junction;

D O I：

10.1088/1674-4926/35/1/014009

中图分类号：

O469 [凝聚态物理学];

学科分类号：

070205 ;

摘要：

A novel buffer super-junction (SJ) lateral double-diffused MOSFET (LDMOS) with an N-type buried layer (NB) is proposed. An N buffer layer is implemented under the SJ region and an N-type layer is buried in the P substrate. Firstly, the new electric field peak introduced by the p-n junction of the P substrate and the N-type buried layer modulates the surface electric field distribution. Secondly, the N buffer layer suppresses the substrate assisted depletion effect. Both of them improve the breakdown voltage (BV). Finally, because of the shallow depth of the SJ region, the NB buffer SJ-LDMOS is compatible with Bi-CMOS technology. Simulation results indicate that the average value of the surface lateral electric field strength of the NB buffer SJ-LDMOS reaches 23 V/mu m at 15 mu m drift length which results in a BV of 350 V and a specific on-resistance of 21 m Omega center dot cm(2)

引用

页数：5

共 14 条

[1] Optimization of super-junction SOI-LDMOS with a step doping surface-implanted layer [J].