共 50 条
- [31] Analysis Optimum Sizing of 12 T PCSA for High Speed Soft Error Tolerant Logic Circuits Design Journal of Electrical Engineering & Technology, 2022, 17 : 3473 - 3485
- [36] Soft-Error-Tolerant Dual-Modular-Redundancy Architecture with Repair and Retry Scheme for Memory-Control Circuit on FPGA IEICE TRANSACTIONS ON ELECTRONICS, 2017, E100C (04): : 382 - 390