A HIGH-FIDELITY DECIMATOR CHIP FOR THE MEASUREMENT OF SIGMA-DELTA MODULATOR PERFORMANCE

被引：7
作者：
KALE, I
MORLING, RCS
KRUKOWSKI, A
TSANG, CW
机构：
[1] University of Westminster
来源：
IEEE TRANSACTIONS ON INSTRUMENTATION AND MEASUREMENT | 1995年 / 44卷 / 05期
关键词：
Digital filters;
D O I：
10.1109/19.414503
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper reports on results from the algorithmic design and simulation of a two-path polyphase decimation filter with 24-bit accuracy over the frequency range from de to 15.2 kHz, The filter is suited for very high precision data conversion and measurement applications. The device reported in this paper has been designed for use with a fourth-order, single-loop, Sigma Delta modulator running at 4096 kHz. Results of floating and fixed-point simulations, architectural design, comparative bit-level simulations and silicon implementation of the decimator are also reported, together with a sample baseband measurement of a fourth-order modulator.
引用
收藏
页码：933 / 939
页数：7
相关论文
共 12 条
  • [1] Valenzuela R.A., Constantinides A.G., Digital signal processing schemes for efficient interpolation and decimation, Proc. Inst. Elect. Eng., 130, 6, pp. 225-235, (1983)
  • [2] Harris F., de Lantremange M.D., Constantinides A.G., Digital signal processing with efficient polyphase recursive all-pass filters, presented at Int. Conf. Signal Processing, (1991)
  • [3] Harris F., On the design and performance of efficient and novel filter structures using recursive allpass filters, Proc. 3rd ISSPA '92, 1, pp. 1-5, (1992)
  • [4] Kale I., Krukowski A., Murphy N.P., On achieving micro-dB ripple polyphase filters with binary scaled coefficients, presented at the Second Int. Symp. on DSP for Communication Systems, (1994)
  • [5] Kale I., Murphy N.P., Patel M.V., On establishing the bounds for binary scaled coefficients of fifth and seventh order polyphase half-band filters, 1SCAS'94, 2, pp. 473-476, (1994)
  • [6] Krukowski A., Kale t., Morling R.C.S., Hejn K., A design technique for polyphase decimators with binary constrained coefficients for high resolution A/D converters, ISCAS'94, 2, pp. 533-536, (1994)
  • [7] Curtis T.E., Webb A.B., High performance signal acquisition systems for sonar applications, presented at the Int. Conf. A/D and D/A Conversion, (1991)
  • [8] Hejn K., Murphy N.P., Kale i., Measurement and enhancement of multistage sigma-delta modulators, Proc. IEEE IMTC/92, Conf., pp. 545-551, (1992)
  • [9] The COMDISCO, Signal Processing Work System (SPW) and Hardware Design System (HDS), COMDISCO Systems Inc., (1994)
  • [10] Mahoney M., DSP-based testing of analog and mixed-signal circuits, (1987)
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