To Design Logic Circuits by Using Symmetrical Coordinate

被引:0
作者
Shen Yu [1 ]
Yu Cheng-Bo [1 ]
机构
[1] Chongqing Univ Technol, Res Inst Remote Test & Control, Chongqing, Peoples R China
关键词
symmetrical coordinate; Logic circuit; Quadrants merge; Procedure diagram;
D O I
10.4304/jcp.5.9.1402-1409
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
Currently there has not been a single tool that could be used to design both the combined circuits and the time-sequential circuits. The symmetrical coordinate system stated in this article can be constructed to represent various states of multi-dimensional logical variables. Using the symmetrical coordinate system, it is not only possible to complete the design of combined circuits, but also to carry out all the procedures needed in the design of time-sequence circuits. Thus the combined circuits and the time-sequential circuits can be easily designed with a same design tool. Experiments are given in this article to illustrate how to use the system of symmetrical coordinate to design the logic circuits.
引用
收藏
页码:1402 / 1409
页数:8
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