A TEST-GENERATION SYSTEM USING A LOGIC SIMULATION ENGINE

A new automatic test pattern generation system has been developed. The system can handle a combinational circuit of about 400 thousand gates, and can achieve a relatively high coverage at high speed by using a special purpose logic simulation engine. Benchmark results show that the system can generate test patterns for a circuit of 50 thousand gates in 174 seconds with a coverage of 95.95 percent. The system will be used as part of the automatic test generation system for Fujitsu ASICs.