A CMOS LINE EQUALIZER FOR A DIGITAL SUBSCRIBER LOOP

被引:0
作者
SUZUKI, T
TAKATORI, H
OGAWA, M
FUJII, F
机构
[1] HITACHI LTD,CTR DEVICE DEV,KOKUBUNJI,TOKYO 185,JAPAN
[2] HITACHI,TOTSUKA WORKS,YOKOHAMA,JAPAN
来源
ISSCC DIGEST OF TECHNICAL PAPERS | 1984年 / 27卷
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:242 / 243
页数:2
相关论文
共 3 条
[1]   DESIGN PHILOSOPHY AND HARDWARE IMPLEMENTATION FOR DIGITAL SUBSCRIBER LOOPS [J].
OGIWARA, H ;
TERADA, Y .
IEEE TRANSACTIONS ON COMMUNICATIONS, 1982, 30 (09) :2057-2065
[2]   LINE EQUALIZER FOR A DIGITAL SUBSCRIBER LOOP EMPLOYING SWITCHED CAPACITOR TECHNOLOGY [J].
SUZUKI, T ;
TAKATORI, H ;
OGAWA, M ;
TOMOOKA, K .
IEEE TRANSACTIONS ON COMMUNICATIONS, 1982, 30 (09) :2074-2082
[3]  
SUZUKI T, 1983, FEB ISSCC, P74