共 50 条
- [41] Efficient exploration of on-chip bus architectures and memory allocation INTERNATIONAL CONFERENCE ON HARDWARE/SOFTWARE CODESIGN AND SYSTEM SYNTHESIS, 2004, : 248 - 253
- [42] Hardware Trojans in Incompletely Specified On-chip Bus Systems PROCEEDINGS OF THE 2016 DESIGN, AUTOMATION & TEST IN EUROPE CONFERENCE & EXHIBITION (DATE), 2016, : 527 - 530
- [43] On-chip split shared data bus architecture for SoC CDES '05: Proceedings of the 2005 International Conference on Computer Design, 2005, : 104 - 108
- [44] Implementation of asynchronous, reorder buffer for asynchronous on-chip bus ISSCS 2005: International Symposium on Signals, Circuits and Systems, Vols 1 and 2, Proceedings, 2005, : 773 - 776
- [45] Analysis of the impact of bus implemented EDCs on on-chip SSN 2006 DESIGN AUTOMATION AND TEST IN EUROPE, VOLS 1-3, PROCEEDINGS, 2006, : 57 - +
- [46] Latency-guided on-chip bus network design ICCAD - 2000 : IEEE/ACM INTERNATIONAL CONFERENCE ON COMPUTER AIDED DESIGN, 2000, : 420 - 423
- [47] CMOS blocks for on-chip RF test Analog Integrated Circuits and Signal Processing, 2006, 49 : 151 - 160
- [48] On-chip emulation for functional test and diagnosis EE-EVALUATION ENGINEERING, 2003, 42 (03): : 32 - +
- [49] Research on fF Range on-chip Capacitance Standard 2024 CONFERENCE ON PRECISION ELECTROMAGNETIC MEASUREMENTS, CPEM 2024, 2024,
- [50] On-chip tensile test for epitaxial polysilicon MEMS 2004: 17TH IEEE INTERNATIONAL CONFERENCE ON MICRO ELECTRO MECHANICAL SYSTEMS, TECHNICAL DIGEST, 2004, : 129 - 132