A Five Mask CMOS LTPS Process With LDD and Only One Ion Implantation Step

被引：5

作者：

Schalberger, Patrick ^{[1
]}

Persidis, Efstathios ^{[1
]}

Fruehauf, Norbert ^{[1
]}

机构：

[1] Univ Stuttgart, Display Technol, Allmandring 3b, D-70569 Stuttgart, Germany

来源：

JOURNAL OF INFORMATION DISPLAY | 2007年 / 8卷 / 01期

关键词：

poly-silicon; CMOS; ion implantation;

D O I：

10.1080/15980316.2007.9652018

中图分类号：

T [工业技术];

学科分类号：

08 ;

摘要：

We have developed a CMOS LTPS process which requires only five photolithographic masks and only one ion doping step. Drain/Source areas of NMOS TFTs were formed by PECVD deposition of a highly doped precursor layer while PMOS contact areas were defined by ion implantation. Single TFTs, inverters, ring oscillators and shift registers were fabricated. Nand p-channel devices reached field effect mobilities of 173cm(2)/Vs and 47cm(2)/Vs, respectively.

引用

页码：1 / 5

页数：5

共 6 条

[1]

Baur H., 2006, J SOC INF DISPLAY, P119

[2]

Hirakata Y., 2004, SOC INFORM DISPLAY D, P1014

[3]

Kim D-M., 2004, J INFORM DISPLAY, V5, P1, DOI 10.1080/15980316.2004.9651933

[4] A novel laser-processed self-aligned gate-overlapped LDD poly-Si TFT [J].

Lin, CW ;

Tseng, CH ;

Chang, TK ;

Lin, CW ;

Wang, WT ;

Cheng, HC .

IEEE ELECTRON DEVICE LETTERS, 2002, 23 (03) :133-135

[5]

Nakazawa K., 1990, SID 90, P311

[6]

Prat C., 1999, Society for Information Display 1999 International Symposium, P298

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