EFFECTIVENESS OF PRIVATE CACHES IN MULTIPROCESSOR SYSTEMS WITH PARALLEL-PIPELINED MEMORIES

被引：0
|
作者：
BRIGGS, FA [1 ]
DUBOIS, M [1 ]
机构：
[1] THOMSON CSF,LCR DOMAINE CORBEVILLE,F-91401 ORSAY,FRANCE
来源：
IEEE TRANSACTIONS ON COMPUTERS | 1983年 / 32卷 / 01期
关键词：
D O I：
暂无
中图分类号：
TP3 [计算技术、计算机技术];
学科分类号：
0812 ;
摘要：
引用
收藏
页码：48 / 59
页数：12
相关论文
共 50 条
  • [41] Rapid Design Space Exploration of Application Specific Heterogeneous Pipelined Multiprocessor Systems
    Javaid, Haris
    Ignjatovic, Aleksander
    Parameswaran, Sri
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2010, 29 (11) : 1777 - 1789
  • [42] Energy Optimization with Worst-Case Deadline Guarantee for Pipelined Multiprocessor Systems
    Chen, Gang
    Huang, Kai
    Buckl, Christian
    Knoll, Alois
    DESIGN, AUTOMATION & TEST IN EUROPE, 2013, : 45 - 50
  • [43] t-Private Systems: Unified Private Memories and Computation
    Park, Jungmin
    Tyagi, Akhilesh
    SECURITY, PRIVACY, AND APPLIED CRYPTOGRAPHY ENGINEERING, 2014, 8804 : 285 - 302
  • [44] Memory-efficient and high-performance parallel-pipelined architectures for 5/3 forward and inverse discrete wavelet transform
    Department of Microelectronics Engineering, Chung Hua University, 707, Sec 2, Wufu Road, Hsinchu 30012, Taiwan
    WSEAS Trans. Electron., 2007, 2 (32-41):
  • [45] Memory-efficient and high-performance parallel-pipelined architectures for 5/3 forward and inverse discrete wavelet transform
    Sung, Tze-Yun
    PROCEEDINGS OF THE 7TH WSEAS INTERNATIONAL CONFERENCE ON MULTIMEDIA SYSTEMS & SIGNAL PROCESSING, 2007, : 1 - +
  • [46] A 250-mW, 8-b, 52-Msamples/s parallel-pipelined A/D converter with reduced number of amplifiers
    Nagaraj, K
    Fetterman, HS
    Anidjar, J
    Lewis, SH
    Renninger, RG
    IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1997, 32 (03) : 312 - 320
  • [47] Scalable parallel word search in multicore/multiprocessor systems
    Drews, Frank
    Lichtenberg, Jens
    Welch, Lonnie
    JOURNAL OF SUPERCOMPUTING, 2010, 51 (01): : 58 - 75
  • [48] A genetic algorithm for tasks scheduling in parallel multiprocessor systems
    Zhong, YW
    Yang, JG
    2003 INTERNATIONAL CONFERENCE ON MACHINE LEARNING AND CYBERNETICS, VOLS 1-5, PROCEEDINGS, 2003, : 1785 - 1790
  • [49] PERFORMANCE ANALYSIS OF PARALLEL SEARCH ALGORITHMS ON MULTIPROCESSOR SYSTEMS
    GHODSI, M
    KANT, K
    PERFORMANCE EVALUATION, 1991, 13 (01) : 67 - 81
  • [50] PARUS: A parallel programming framework for heterogeneous multiprocessor systems
    Salnikov, Alexey N.
    RECENT ADVANCES IN PARALLEL VIRTUAL MACHINE AND MESSAGE PASSING INTERFACE, 2006, 4192 : 408 - 409
12345