SIMD MATRIX-METHODS FOR DETECTING HAZARDS IN LOGIC-CIRCUITS

被引：2

作者：

HEAL, BW

PAGE, RMR

机构：

[1] Univ of Portsmouth, Portsmouth

来源：

IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES | 1993年 / 140卷 / 04期

关键词：

COMBINATORIAL LOGIC CIRCUITS; ALGORITHMS; SIMD COMPUTERS; MATRIX ALGEBRA; HAZARDS;

D O I：

10.1049/ip-e.1993.0029

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The paper describes the underlying theory and an outline for an algorithm which is designed to utilise the power of SIMD computers to detect and locate the presence of logic hazards in combinational logic circuits.

引用

页码：201 / 204

页数：4

共 50 条

[1] MATRIX-METHODS AND CIRCUITS
RIDGELY, P
AMERICAN JOURNAL OF PHYSICS, 1985, 53 (11) : 1038 - 1038
[2] POWER ESTIMATION METHODS FOR SEQUENTIAL LOGIC-CIRCUITS
TSUI, CY
MONTEIRO, J
PEDRAM, M
DEVADAS, S
DESPAIN, AM
LIN, B
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 1995, 3 (03) : 404 - 416
[3] ECL LOGIC-CIRCUITS
BYERS, TJ
RADIO-ELECTRONICS, 1983, 54 (09): : 53 - 56
[4] DIGITAL LOGIC-CIRCUITS
HASUO, S
IMAMURA, T
PROCEEDINGS OF THE IEEE, 1989, 77 (08) : 1177 - 1193
[5] MATRIX-METHODS
PARSONS, JA
JOURNAL OF SYSTEMS MANAGEMENT, 1977, 28 (01): : 36 - 38
[6] RELIABILITY EVALUATION OF LOGIC-CIRCUITS
ROCA, JL
MICROELECTRONICS AND RELIABILITY, 1985, 25 (02): : 257 - 260
[7] MINIATURIZATION OF JOSEPHSON LOGIC-CIRCUITS
KO, H
VANDUZER, T
IEEE TRANSACTIONS ON MAGNETICS, 1985, 21 (02) : 725 - 728
[8] RELIABILITY ANALYSIS OF LOGIC-CIRCUITS
DESMARAIS, P
KRIEGER, M
MICROELECTRONICS AND RELIABILITY, 1977, 16 (01): : 29 - 33
[9] Parallel algorithms for detecting hazards in combinational logic circuits
Tan, EC
IEEE 2000 TENCON PROCEEDINGS, VOLS I-III: INTELLIGENT SYSTEMS AND TECHNOLOGIES FOR THE NEW MILLENNIUM, 2000, : 177 - 181
[10] AN ALGORITHM FOR THE PARTITIONING OF LOGIC-CIRCUITS
ROBERTS, MW
LALA, PK
IEE PROCEEDINGS-E COMPUTERS AND DIGITAL TECHNIQUES, 1984, 131 (04): : 113 - 118

← 1 2 3 4 5 →