COMPUTERIZATION OF MOS-TRANSISTOR CIRCUIT CALCULATION

[1] CONDUCTANCE OF MOS TRANSISTORS IN SATURATION [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1969, ED16 (01) : 108 - +

[2] COMPUTER-AIDED DESIGN AND CHARACTERIZATION OF DIGITAL MOS INTEGRATED CIRCUITS [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1969, SC 4 (02) : 57 - &

[3] ILIN VN, 1975, AVTOMATIKA TELEMEKHA, V36, P196

[4] MACCRACKEN D, 1969, NUMERICAL METHODS IN

[5] BIAS-3 - PROGRAM FOR NONLINEAR DC ANALYSIS OF BIPOLAR TRANSISTOR CIRCUITS [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1971, SC 6 (01) : 14 - &

[6] PETRENKO AI, 1973, IZV VUZ RADIOELEKTRO, P5

[7] PRANGISHVILI IV, 1973, QUESTIONS CYBERNETIC, P24

[8] SKUGAREV VV, 1973, IZV VUZ RADIOELECTRO, P50

[9] 1972, AUTOMATIC SYSTEM ANA

[1] CONDUCTANCE OF MOS TRANSISTORS IN SATURATION [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1969, ED16 (01) : 108 - +

[2] COMPUTER-AIDED DESIGN AND CHARACTERIZATION OF DIGITAL MOS INTEGRATED CIRCUITS [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1969, SC 4 (02) : 57 - &

[3] ILIN VN, 1975, AVTOMATIKA TELEMEKHA, V36, P196

[4] MACCRACKEN D, 1969, NUMERICAL METHODS IN

[5] BIAS-3 - PROGRAM FOR NONLINEAR DC ANALYSIS OF BIPOLAR TRANSISTOR CIRCUITS [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1971, SC 6 (01) : 14 - &

[6] PETRENKO AI, 1973, IZV VUZ RADIOELEKTRO, P5

[7] PRANGISHVILI IV, 1973, QUESTIONS CYBERNETIC, P24

[8] SKUGAREV VV, 1973, IZV VUZ RADIOELECTRO, P50

[9] 1972, AUTOMATIC SYSTEM ANA