REAL-WORLD BOARD TEST EFFECTIVENESS

被引:0
作者
SCHLOTZHAUER, EO
机构
[1] Hewlett-Packard, Loveland, CO, USA
来源
IEEE DESIGN & TEST OF COMPUTERS | 1988年 / 5卷 / 02期
关键词
FAILURE ANALYSIS - INTEGRATED CIRCUITS; VLSI; --; Testing;
D O I
10.1109/54.2033
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Conventional wisdom about in-circuit testing is challenged, namely, that in-circuit tests can achieve only a 70%-85% yield, and that to get beyond these yield limitations, or detect at-speed timing faults and gain confidence on complex digital boards, functional test is required. A study showing in-circuit testing can routinely deliver testing yields in the high 90% range is reported. The study involves 34,296 boards, comprising 15 board types, and representing 6,671,038 components. These boards had a weighted average yield out of in-circuit test of 96.9%. If board test is viewed as a process to be monitored and improved, the limit suggested here is around 97%. It is shown that in-circuit tests are excellent at screening passive components, medium- to low-complexity digital devices, and shorts. Even in boards with complex VLSI devices, the in-circuit test exhibited high yields.
引用
收藏
页码:16 / 23
页数:8
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