NOISE AND LEARNING IN SEMICONDUCTOR MANUFACTURING

Rapid technological learning is critical to commercial success in VLSI semiconductor manufacturing. This learning is done through deliberate activities, especially various types of experimentation. Such experiments are vulnerable to confounding by process noise, caused by process variability. Therefore plants with low noise levels can potentially learn more effectively than high noise plants. Detailed die yield data from five semiconductor plants were examined to estimate process noise levels. A bootstrap simulation was used to estimate the error rates of identical controlled experiments conducted in each plant. Absolute noise levels were high for all but the best plants, leading to lost learning. For example, the probability of overlooking a three percent yield improvement was above twenty percent in all but one plant. Brute-force statistical methods are either expensive or ineffective for dealing with these high noise levels. Depending on the criterion used, there was a four- to ten-fold difference among the plants.