A 10-BIT 20-MS/S 3-V SUPPLY CMOS A/D CONVERTER

被引：22

作者：

ITO, M ^{[1
]}

MIKI, T ^{[1
]}

HOSOTANI, S ^{[1
]}

KUMAMOTO, T ^{[1
]}

YAMASHITA, Y ^{[1
]}

KIJIMA, M ^{[1
]}

OKUDA, T ^{[1
]}

OKADA, K ^{[1
]}

机构：

[1] MITSUBISHI ELECTR CORP,ULSI LAB,ITAMI,HYOGO 664,JAPAN

来源：

IEEE JOURNAL OF SOLID-STATE CIRCUITS | 1994年 / 29卷 / 12期

关键词：

D O I：

10.1109/4.340427

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A 10 bit CMOS A/D converter with 3 V power supply has been developed for being integrated into system VLSI's. In this A/D converter, redundant binary encoders named ''twin encoders'' enhance tolerance to substrate noise, together with employing differential amplifiers in comparators. The bias circuit using a replica of the amplifier is developed for biasing differential comparators with 3 V power supply. Subranging architecture along with a multilevel tree decoding structure improves dynamic performance of the ADC at 3 V power supply. The A/D converter is fabricated in double-polysilicon, double-metal, 0.8 mu m CMOS technology. The experimental results show that the ADC operates at 20 MS/s and the twin encoders suppress the influence of substrate noise effectively. This ADC has a single power supply of 3 V, and dissipates 135 mW at 20 MS/s operation.

引用

页码：1531 / 1536

页数：6

共 10 条

[1] AN 8-MHZ CMOS SUBRANGING 8-BIT A/D CONVERTER
DINGWALL, AGF
ZAZZU, V
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1985, 20 (06) : 1138 - 1143
[2] FUKUDA KM, 1993, MAY S VLSI CIRC, P23
[3] GENDAI Y, 1991, FEB ISSCC, P172
[4] AN 8-BIT 20-MS/S CMOS A/D CONVERTER WITH 50-MW POWER-CONSUMPTION
HOSOTANI, S
MIKI, T
MAEDA, A
YAZAWA, N
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1990, 25 (01) : 167 - 172
[5] HOSOTANI S, 1989, MAY S VLSI CIRC, P55
[6] AN 8-BIT HIGH-SPEED CMOS A/D CONVERTER
KUMAMOTO, T
NAKAYA, M
HONDA, H
ASAI, S
AKASAKA, Y
HORIBA, Y
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1986, 21 (06) : 976 - 982
[7] A 10-B 20-MHZ 30-MW PIPELINED INTERPOLATING CMOS ADC
KUSUMOTO, K
MATSUZAWA, A
MURATA, K
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1993, 28 (12) : 1200 - 1206
[8] MATSUURA T, 1992, JUN S VLSI CIRC, P98
[9] MATSUZAWA A, 1991, MAY S VLSI CIRC, P113
[10] A 10-B 50-MHZ CMOS D/A CONVERTER WITH 75-OMEGA BUFFER
PELGROM, MJM
[J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1990, 25 (06) : 1347 - 1352

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