IMAGE-PROCESSING EXPERIMENTS ON A MULTIMICROPROCESSOR SYSTEM

This paper presents the design of a multi-microcomputer which provides the basis of a system useful for processing large numbers of images. We present the architecture, the features of the operating system and experimental results. This system consists of a central computer and a number of satellite microcomputers. Communication between the central computer and each satellite is accomplished through dual-ported RAMs. It is a single bus system with a 'star' architecture, which under certain conditions can simulate other architectures. We have developed an operating system that allows our multicomputer system to be used in 'user', 'star', 'queue' and 'pipeline' processing modes. These processing modes allow the user to configure a powerful queueing multicomputer system. This paper presents models that predict the throughput of the system, and reports on an extensive set of experiments that are designed to test the system and verify its performance increase as a function of the number of satellites.