SOURCE AND DRAIN RESISTANCE DETERMINATION FOR MOSFETS

[1] ANTOGNETTI P, 1981, DEC IEDM

[2] MODELS FOR COMPUTER-SIMULATION OF COMPLETE IC FABRICATION PROCESS [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1979, 14 (02) : 412 - 422

[3] SPREADING RESISTANCE IN SUB-MICRON MOSFETS [J]. IEEE ELECTRON DEVICE LETTERS, 1983, 4 (02) : 27 - 29

[4] CHATTERJEE PK, 1980, ELECTRON DEVIC LETT, V1, P220

[5] DEMOULIN E, 1979, DEC IEDM

[6] MOS DEVICE AND TECHNOLOGY CONSTRAINTS IN VLSI [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1982, 29 (04) : 567 - 573

[7] MINIMOS - A TWO-DIMENSIONAL MOS-TRANSISTOR ANALYZER [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1980, 27 (08) : 1540 - 1550

[8] EXPERIMENTAL DERIVATION OF THE SOURCE AND DRAIN RESISTANCE OF MOS-TRANSISTORS [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1980, 27 (09) : 1846 - 1848

[1] ANTOGNETTI P, 1981, DEC IEDM

[2] MODELS FOR COMPUTER-SIMULATION OF COMPLETE IC FABRICATION PROCESS [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1979, 14 (02) : 412 - 422

[3] SPREADING RESISTANCE IN SUB-MICRON MOSFETS [J]. IEEE ELECTRON DEVICE LETTERS, 1983, 4 (02) : 27 - 29

[4] CHATTERJEE PK, 1980, ELECTRON DEVIC LETT, V1, P220

[5] DEMOULIN E, 1979, DEC IEDM

[6] MOS DEVICE AND TECHNOLOGY CONSTRAINTS IN VLSI [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1982, 29 (04) : 567 - 573

[7] MINIMOS - A TWO-DIMENSIONAL MOS-TRANSISTOR ANALYZER [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1980, 27 (08) : 1540 - 1550

[8] EXPERIMENTAL DERIVATION OF THE SOURCE AND DRAIN RESISTANCE OF MOS-TRANSISTORS [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 1980, 27 (09) : 1846 - 1848