A LOW-POWER HIGH-PERFORMANCE POLYGON RENDERER FOR COMPUTER-GRAPHICS

被引:0
|
作者
TAN, WC
MENG, THY
机构
[1] Department of Electrical Engineering, Stanford University, Stanford, 94305, CA
来源
JOURNAL OF VLSI SIGNAL PROCESSING | 1995年 / 9卷 / 03期
关键词
D O I
10.1007/BF02407087
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Polygon rasterization is one of the most computational and memory intensive operations in computer graphics. In this paper, we present a low-power, real-time hardware design for this task. The system is resolution-independent by configuring different numbers of render engines in a 2-dimensional array. Using an array configuration of 16 render engines for a 512 x 512-pixel display, a peak performance of up to 3.4 million Gouraud-shaded polygons/sec is achievable. Total power consumption, depending on the polygon throughput, ranges between 17 mW to 133 mW at 1.5 V operation. A format for transmitting polygon information is proposed at a typical bandwidth of 4 Mbps, suitable for wireless transmission. This screen and format configurable design has potential application in portable, wireless head-mounted displays for virtual reality systems.
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页码:233 / 255
页数:23
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