COMPILING FOR THE CYDRA-5

被引:64
作者
DEHNERT, JC
TOWLE, RA
机构
[1] Silicon Graphics Computer Systems, Mountain View, 94039, CA
关键词
INTERMEDIATE REPRESENTATION; SOFTWARE PIPELINING; IF CONVERSION; EAGER CODE MOTION; REGISTER ALLOCATION; LOAD STORE OPTIMIZATION; RENAMING; RECURRENCE OPTIMIZATION;
D O I
10.1007/BF01205184
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The Cydra 5 is a VLIW minisupercomputer with hardware designed to accelerate a broad class of inner loops, presenting unique challenges to its compilers. We discuss the organization of its Fortran/77 compiler and several of the key approaches developed to fully exploit the hardware. These include the intermediate representation used; the preparation, overlapped scheduling, and register allocation of inner loops; the speculative execution model used to control global code motion; and the machine model and local instruction scheduling approach.
引用
收藏
页码:181 / 227
页数:47
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