Universal trench design method for a high-voltage SOI trench LDMOS

被引：2
|
作者：
Hu Xiarong [1 ]
Zhang Bo [1 ]
Luo Xiaorong [1 ]
Li Zhaoji [1 ]
机构：
[1] Univ Elect Sci & Technol China, State Key Lab Elect Thin Films & Integrated Devic, Chengdu 610054, Sichuan, Peoples R China
来源：
JOURNAL OF SEMICONDUCTORS | 2012年 / 33卷 / 07期
基金：
中国国家自然科学基金;
关键词：
SOI; trench; permittivity; RESURF; LDMOS; breakdown voltage;
D O I：
10.1088/1674-4926/33/7/074006
中图分类号：
O469 [凝聚态物理学];
学科分类号：
070205 ;
摘要：
The design method for a high-voltage SOI trench LDMOS for various trench permittivities, widths and depths is introduced. A universal method for efficient design is presented for the first time, taking the trade-off between breakdown voltage (BV) and specific on-resistance (R-s,(on))into account. The high-k (relative permittivity) dielectric is suitable to fill a shallow and wide trench while the low-k dielectric is suitable to fill a deep and narrow trench. An SOI LDMOS with a vacuum trench in the drift region is also discussed. Simulation results show that the high FOM BV2/R-s,R-on can be achieved with a trench filled with the low-k dielectric due to its shortened cell-pitch.
引用
收藏
页数：4
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