A Genetic Algorithm for Energy Aware Task Scheduling in Heterogeneous Systems

被引:2
作者
Lin, Man [1 ]
Ng, Sai Man [1 ]
机构
[1] St Francis Xavier Univ, Dept Comp Sci, POB 5000, Antigonish, NS B2G 2W5, Canada
基金
加拿大自然科学与工程研究理事会;
关键词
Energy optimization; task scheduling; real-time systems; embedded Systems; genetic algorithms;
D O I
10.1142/S0129626405002350
中图分类号
TP39 [计算机的应用];
学科分类号
081203 ; 0835 ;
摘要
In distributed systems, an application can be decomposed to tasks which can be executed on different processors in parallel. Modern processors allow variable supply voltages and dynamic voltage scaling (DVS) provides the possibility to reduce the power consumption. In this paper, we present a static scheduling approach to integrate task mapping, scheduling and voltage selection to minimize energy consumption of real-time dependent tasks executing on a number of heterogeneous processors. The approach is based on Genetic Algorithms. The simulation results show that the proposed algorithm is very effective and reduces the energy consumption ranging from 20% to 90% under different system configurations. We also compare the proposed genetic-algorithm-based energy aware algorithm with other three algorithms, namely earliest-deadline-first-based, longest-time-first-based and simulated-annealing-based energy aware algorithms. The comparison results demonstrate that the genetic-algorithm-based energy aware algorithm outperforms other three algorithms.
引用
收藏
页码:439 / 449
页数:11
相关论文
共 13 条
[1]  
Burd T. D., 1995, Proceedings of the Twenty-Eighth Hawaii International Conference on System Sciences, P288, DOI 10.1109/HICSS.1995.375385
[2]   A dynamic voltage scaled microprocessor system [J].
Burd, TD ;
Pering, TA ;
Stratakos, AJ ;
Brodersen, RW .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 2000, 35 (11) :1571-1580
[3]  
Chandrakasan A. P., 1995, LOW POWER DIGITAL CM
[4]  
Glover F., 1993, MODERN HEURISTIC TEC
[5]  
Gruian F, 2001, PROCEEDINGS OF THE ASP-DAC 2001: ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE 2001, P449, DOI 10.1109/ASPDAC.2001.913349
[6]  
Ishihara T, 1998, 1998 INTERNATIONAL SYMPOSIUM ON LOW POWER ELECTRONICS AND DESIGN - PROCEEDINGS, P197, DOI 10.1109/LPE.1998.708188
[7]  
LIN M, 1999, P 6 INT C REAL TIM C, P382
[8]   Static and dynamic variable voltage scheduling algorithms for real-time heterogeneous distributed embedded systems [J].
Luo, J ;
Jha, N .
ASP-DAC/VLSI DESIGN 2002: 7TH ASIA AND SOUTH PACIFIC DESIGN AUTOMATION CONFERENCE AND 15TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS, 2002, :719-726
[9]  
Michalewicz Z, 1994, GENETIC ALGORITHMS D
[10]  
Oh J., 2002, J SYSTEMS SOFTWARE