A COMPARATIVE-STUDY OF TISI2, OBTAINED BY SOLID-STATE REACTION AND CHEMICAL-VAPOR-DEPOSITION

Contact metallization over very shallow junctions is one of the most important issues within the ultra large scale integration technology. Titanium salicidation is normally used as the gate and source/drain contacts. Some problems are Si substrate consumption and dopant outdiffusion. We have developed a TiSi2 deposition technique from the vapor phase with minimum substrate interaction and dopant redistribution. This technique is used in a 0.5 mu m CMOS process and compared to the conventional one. Dopant profiles are measured as well as electrical parameters such as active device leakage current, contact resistance and propagation delay time. General results of the two techniques are comparable and in some respects the CVD technique is clearly better which makes it very promising for sub-half micron integrated process.