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JUNCTION TERMINATION EXTENSION FOR NEAR-IDEAL BREAKDOWN VOLTAGE IN P-N-JUNCTIONS
被引:82
作者
:
TEMPLE, VAK
论文数:
0
引用数:
0
h-index:
0
TEMPLE, VAK
TANTRAPORN, W
论文数:
0
引用数:
0
h-index:
0
TANTRAPORN, W
机构
:
来源
:
IEEE TRANSACTIONS ON ELECTRON DEVICES
|
1986年
/ 33卷
/ 10期
关键词
:
D O I
:
10.1109/T-ED.1986.22713
中图分类号
:
TM [电工技术];
TN [电子技术、通信技术];
学科分类号
:
0808 ;
0809 ;
摘要
:
引用
收藏
页码:1601 / 1608
页数:8
相关论文
共 7 条
[1]
THEORY AND BREAKDOWN VOLTAGE FOR PLANAR DEVICES WITH A SINGLE FIELD LIMITING RING
[J].
ADLER, MS
论文数:
0
引用数:
0
h-index:
0
机构:
GE, SCHENECTADY, NY 12301 USA
GE, SCHENECTADY, NY 12301 USA
ADLER, MS
;
TEMPLE, VAK
论文数:
0
引用数:
0
h-index:
0
机构:
GE, SCHENECTADY, NY 12301 USA
GE, SCHENECTADY, NY 12301 USA
TEMPLE, VAK
;
FERRO, AP
论文数:
0
引用数:
0
h-index:
0
机构:
GE, SCHENECTADY, NY 12301 USA
GE, SCHENECTADY, NY 12301 USA
FERRO, AP
;
RUSTAY, RC
论文数:
0
引用数:
0
h-index:
0
机构:
GE, SCHENECTADY, NY 12301 USA
GE, SCHENECTADY, NY 12301 USA
RUSTAY, RC
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1977,
24
(02)
:107
-113
[2]
ADLER MS, 1981, 81CRD190 GEN EL REP
[3]
TEMPLE V, 1977, IEDM TECH DIGN, P432
[4]
THEORY AND APPLICATION OF A SIMPLE ETCH CONTOUR FOR NEAR IDEAL BREAKDOWN VOLTAGE IN PLANE AND PLANAR PN JUNCTIONS
[J].
TEMPLE, VAK
论文数:
0
引用数:
0
h-index:
0
机构:
GE, RES & DEV CLIN, SCHENECTADY, NY 12301 USA
GE, RES & DEV CLIN, SCHENECTADY, NY 12301 USA
TEMPLE, VAK
;
ADLER, MS
论文数:
0
引用数:
0
h-index:
0
机构:
GE, RES & DEV CLIN, SCHENECTADY, NY 12301 USA
GE, RES & DEV CLIN, SCHENECTADY, NY 12301 USA
ADLER, MS
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1976,
23
(08)
:950
-955
[5]
INCREASED AVALANCHE BREAKDOWN VOLTAGE AND CONTROLLED SURFACE ELECTRIC-FIELDS USING A JUNCTION TERMINATION EXTENSION (JTE) TECHNIQUE
[J].
TEMPLE, VAK
论文数:
0
引用数:
0
h-index:
0
TEMPLE, VAK
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1983,
30
(08)
:954
-957
[6]
SUBSTRATE ETCH GEOMETRY FOR NEAR IDEAL BREAKDOWN VOLTAGE IN P-N-JUNCTION DEVICES
[J].
TEMPLE, VAK
论文数:
0
引用数:
0
h-index:
0
机构:
GE, CTR RES & DEV, SCHENECTADY, NY 12301 USA
GE, CTR RES & DEV, SCHENECTADY, NY 12301 USA
TEMPLE, VAK
;
ADLER, MS
论文数:
0
引用数:
0
h-index:
0
机构:
GE, CTR RES & DEV, SCHENECTADY, NY 12301 USA
GE, CTR RES & DEV, SCHENECTADY, NY 12301 USA
ADLER, MS
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1977,
24
(08)
:1077
-1081
[7]
PRACTICAL ASPECTS OF THE DEPLETION ETCH METHOD IN HIGH-VOLTAGE DEVICES
[J].
TEMPLE, VAK
论文数:
0
引用数:
0
h-index:
0
TEMPLE, VAK
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1980,
27
(05)
:977
-982
←
1
→
共 7 条
[1]
THEORY AND BREAKDOWN VOLTAGE FOR PLANAR DEVICES WITH A SINGLE FIELD LIMITING RING
[J].
ADLER, MS
论文数:
0
引用数:
0
h-index:
0
机构:
GE, SCHENECTADY, NY 12301 USA
GE, SCHENECTADY, NY 12301 USA
ADLER, MS
;
TEMPLE, VAK
论文数:
0
引用数:
0
h-index:
0
机构:
GE, SCHENECTADY, NY 12301 USA
GE, SCHENECTADY, NY 12301 USA
TEMPLE, VAK
;
FERRO, AP
论文数:
0
引用数:
0
h-index:
0
机构:
GE, SCHENECTADY, NY 12301 USA
GE, SCHENECTADY, NY 12301 USA
FERRO, AP
;
RUSTAY, RC
论文数:
0
引用数:
0
h-index:
0
机构:
GE, SCHENECTADY, NY 12301 USA
GE, SCHENECTADY, NY 12301 USA
RUSTAY, RC
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1977,
24
(02)
:107
-113
[2]
ADLER MS, 1981, 81CRD190 GEN EL REP
[3]
TEMPLE V, 1977, IEDM TECH DIGN, P432
[4]
THEORY AND APPLICATION OF A SIMPLE ETCH CONTOUR FOR NEAR IDEAL BREAKDOWN VOLTAGE IN PLANE AND PLANAR PN JUNCTIONS
[J].
TEMPLE, VAK
论文数:
0
引用数:
0
h-index:
0
机构:
GE, RES & DEV CLIN, SCHENECTADY, NY 12301 USA
GE, RES & DEV CLIN, SCHENECTADY, NY 12301 USA
TEMPLE, VAK
;
ADLER, MS
论文数:
0
引用数:
0
h-index:
0
机构:
GE, RES & DEV CLIN, SCHENECTADY, NY 12301 USA
GE, RES & DEV CLIN, SCHENECTADY, NY 12301 USA
ADLER, MS
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1976,
23
(08)
:950
-955
[5]
INCREASED AVALANCHE BREAKDOWN VOLTAGE AND CONTROLLED SURFACE ELECTRIC-FIELDS USING A JUNCTION TERMINATION EXTENSION (JTE) TECHNIQUE
[J].
TEMPLE, VAK
论文数:
0
引用数:
0
h-index:
0
TEMPLE, VAK
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1983,
30
(08)
:954
-957
[6]
SUBSTRATE ETCH GEOMETRY FOR NEAR IDEAL BREAKDOWN VOLTAGE IN P-N-JUNCTION DEVICES
[J].
TEMPLE, VAK
论文数:
0
引用数:
0
h-index:
0
机构:
GE, CTR RES & DEV, SCHENECTADY, NY 12301 USA
GE, CTR RES & DEV, SCHENECTADY, NY 12301 USA
TEMPLE, VAK
;
ADLER, MS
论文数:
0
引用数:
0
h-index:
0
机构:
GE, CTR RES & DEV, SCHENECTADY, NY 12301 USA
GE, CTR RES & DEV, SCHENECTADY, NY 12301 USA
ADLER, MS
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1977,
24
(08)
:1077
-1081
[7]
PRACTICAL ASPECTS OF THE DEPLETION ETCH METHOD IN HIGH-VOLTAGE DEVICES
[J].
TEMPLE, VAK
论文数:
0
引用数:
0
h-index:
0
TEMPLE, VAK
.
IEEE TRANSACTIONS ON ELECTRON DEVICES,
1980,
27
(05)
:977
-982
←
1
→