STRUCTURES FOR THERMAL-STRESS REDUCTION IN GAAS-LAYERS GROWN ON SI SUBSTRATE

被引：17
作者：
SAKAI, S
KAWASAKI, K
WADA, N
机构：
[1] Department of Electric and Electronic Engineering, University of Tokushima, Minami-Josanjima, Tokushima
来源：
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS | 1990年 / 29卷 / 10期
关键词：
Defect; Finite-element method; GaAs on Si; Heteroepitaxy; Thermal expansion coefficient; Thermal stress;
D O I：
10.1143/JJAP.29.2077
中图分类号：
O59 [应用物理学];
学科分类号：
摘要：
The structures to reduce the thermal stress in GaAs grown on Si substrates produced by the thermal expansion coefficient mismatch are proposed and analyzed by the finite-element method. It was shown that the stress can be below 1/10 of the stress in the planar GaAs on Si by partially separating the GaAs layer from the substrate. The preliminary experimental results show that this technique reduces the stress to 1/10 of the normal stress in the area of as wide as 200×250 µm2. © 1990 IOP Publishing Ltd.
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页码：2077 / 2081
页数：5
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