I2L - COMPREHENSIVE REVIEW OF TECHNIQUES AND TECHNOLOGY

[1] ADRIAANS W, 1975, ELECTRONICS 0904, P110

[2] ALLEN RA, 1974, IEEE INT SOLID STATE, P16

[3] ALTMAN L, 1975, ELECTRONICS, V48, P86

[4] ALTMAN L, 1975, ELECTRONICS, V48, P57

[5] BAHRAMAN A, 1976, NOV GOMAC 76

[6] MERGED-TRANSISTOR LOGIC (MTL) - LOW-COST BIPOLAR LOGIC CONCEPT [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1972, SC 7 (05) : 340 - &

[7] TERMINAL-ORIENTED MODEL FOR MERGED TRANSISTOR LOGIC (MTL) [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1974, SC 9 (05) : 211 - 217

[8] BERGER HH, 1974, ISSCC DIG TECH P FEB, P14

[9] BERGER HH, 1975, ISSCC, P172

[10] BERGER HH, 1974, IEEE J SOLID STATE C, V9, P128

[1] ADRIAANS W, 1975, ELECTRONICS 0904, P110

[2] ALLEN RA, 1974, IEEE INT SOLID STATE, P16

[3] ALTMAN L, 1975, ELECTRONICS, V48, P86

[4] ALTMAN L, 1975, ELECTRONICS, V48, P57

[5] BAHRAMAN A, 1976, NOV GOMAC 76

[6] MERGED-TRANSISTOR LOGIC (MTL) - LOW-COST BIPOLAR LOGIC CONCEPT [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1972, SC 7 (05) : 340 - &

[7] TERMINAL-ORIENTED MODEL FOR MERGED TRANSISTOR LOGIC (MTL) [J]. IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1974, SC 9 (05) : 211 - 217

[8] BERGER HH, 1974, ISSCC DIG TECH P FEB, P14

[9] BERGER HH, 1975, ISSCC, P172

[10] BERGER HH, 1974, IEEE J SOLID STATE C, V9, P128