CMOS CURRENT-MODE MULTIVALUED PLAS

被引：18
作者：
PELAYO, FJ
PRIETO, A
LLORIS, A
ORTEGA, J
机构：
[1] Dept de Electronica y Tecnologia de, Computadores, Univ de Granada
来源：
IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS | 1991年 / 38卷 / 04期
关键词：
D O I：
10.1109/31.75400
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
This paper presents a new PLA structure for the implementation of multivalued combinational and sequential systems. The proposed PLA makes a NOR/TSUM two-level synthesis of multivalued functions using a minimal number of literals for each variable. PseudonMOS and dynamic CMOS implementations for the proposed PLA are also presented, using current-mode inputs and outputs. Since these PLA's operate with several current levels, a significant saving in silicon area may be obtained, in comparison with binary PLA's. A four-valued PLA prototype was manufactured using an ordinary CMOS process. The paper includes experimental measures for this prototype.
引用
收藏
页码：434 / 441
页数：8
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