NOVEL CMOS PIPELINED A/D CONVERTER ARCHITECTURE USING CURRENT MIRRORS

被引:9
作者
ROBERT, J
DEVAL, P
WEGMANN, G
机构
关键词
D O I
10.1049/el:19890467
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
引用
收藏
页码:691 / 692
页数:2
相关论文
共 8 条
[1]   CURRENT COPIER CELLS [J].
DAUBERT, SJ ;
VALLANCOURT, D ;
TSIVIDIS, YP .
ELECTRONICS LETTERS, 1988, 24 (25) :1560-1562
[2]  
GROENEVELD W, 1989, FEB ISSCC, P22
[3]  
LEWIS SH, 1987, FEB ISSCC, P210
[4]   A 12-BIT 1-MSAMPLE/S CAPACITOR ERROR-AVERAGING PIPELINED A/D CONVERTER [J].
SONG, BS ;
TOMPSETT, MF ;
LAKSHMIKUMAR, KR .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1988, 23 (06) :1324-1333
[5]   A PIPELINED 13-BIT, 250-KS/S, 5-V ANALOG-TO-DIGITAL CONVERTER [J].
SUTARJA, S ;
GRAY, PR .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1988, 23 (06) :1316-1323
[6]   HIGH-ACCURACY PIPELINE A/D CONVERTER CONFIGURATION [J].
TEMES, GC .
ELECTRONICS LETTERS, 1985, 21 (17) :762-763
[7]  
VITTOZ EA, 1988, MAY FIN SEM PROJ CMO
[8]   VERY ACCURATE DYNAMIC CURRENT MIRRORS [J].
WEGMANN, G ;
VITTOZ, EA .
ELECTRONICS LETTERS, 1989, 25 (10) :644-646