The effects of substrate self-biasing on the growth of Sn-catalysed silicon nanowires grown at low pressure

We describe the fabrication of silicon nanowire arrays on silicon substrates using Sn as a catalyst metal and electron cyclotron resonance chemical vapour deposition as the growth method. This technique features low deposition pressures and long mean-free paths, allowing the ability to control the ion bombardment energies at the substrate with the application of RF power to the substrate. The applied RF signal generates a DC self-bias across the substrate. Wires have been grown under differing levels of DC self-bias from 0 to −100 V. The impact on wire density, morphology and catalyst stability is described.