Design energy efficient shared distributed memory management system on SoC’s to improve memory performance

System-on-Chip (SoC) design is becoming increasingly complex as a result of trends such as miniaturisation and data-intensive applications, and it is becoming increasingly difficult to manage without the use of automated design methods. Prior work proposed a novel technique called optimal energy efficient load aware memory management, which concentrated on the amount of extra storage after mapping using a task monitoring algorithm and reduced the amount of energy consumed. Every shared distributed memory algorithm that has been proposed has been influenced by embedded system synthesis theory. The following are the contributions made by this work to the fields of SoC design in general and on-chip memory optimization in particular. This paper proposes a complete workflow to improve memory subsystems in an application-specific way when the system was designed. In general, the proposed memory optimization methods generate good results in Xilinx's 14.2 integrated simulation environment, when integrated into the complete simulation, optimization, and code generation flow.