Analog Realization of Electronically Tunable Fractional-Order Differ-Integrators

This paper presents simple structures of fractional-order differentiators and fractional-order integrators. For these structures, both current mode and voltage mode designs have been implemented for differential input signals. The analog realizations of these fractional circuits use a single active element, the Differential Voltage Current Conveyor Transconductance Amplifier (DVCCTA), and a capacitive fractor. The passive elements present in the capacitive fractor are arranged in parallel RC ladder topology with their consecutive values in geometric progression. In the proposed structures, the capacitive fractor and the resistances connected at different ports of DVCCTA are all grounded, hence, making the designs simpler and less sensitive to the parasitic effects. Apart from this, the other key features of these designs are—electronically tunable, high dynamic range, robust and accurate. Simulations of all the four models are performed using TSMC 0.25μm\documentclass[12pt]{minimal} \usepackage{amsmath} \usepackage{wasysym} \usepackage{amsfonts} \usepackage{amssymb} \usepackage{amsbsy} \usepackage{mathrsfs} \usepackage{upgreek} \setlength{\oddsidemargin}{-69pt} \begin{document}$$0.25\,\upmu \hbox {m}$$\end{document} technology in MentorGraphics. The non-ideal analysis of DVCCTA device and Monte Carlo analysis have been studied to validate the robustness of these models. The results obtained are in compliance with their corresponding ideal responses. Comparisons with other active element-based structures have been presented to substantiate the work proposed in this paper.