Wafer-Lever Hermetic Package with Through-Wafer Interconnects

被引：0

作者：

Wang Yu-Chuan

Zhu Da-Peng

Xu Wei

Le Luo

机构：

[1] Chinese Academy of Sciences,Shanghai Institute of Microsystem and Information Technology

[2] Chinese Academy of Sciences,Graduate School

来源：

Journal of Electronic Materials | 2007年 / 36卷

关键词：

MEMS; wafer-level hermetic packaging; through-wafer via interconnect; MIL-STD;

D O I：

暂无

中图分类号：

学科分类号：

摘要：

This paper reports a new wafer-level hermetic packaging structure with the features of low processing cost and high I/O density by using wet and dry sequentially etched through-wafer vias for the interconnects of a microelectro mechanical systems (MEMS) device. A thin Si wafer cap and wafer-level fabrication processes such as deep reactive ion etching (DRIE) and KOH etching, bottom-up copper filling, and Sn solder bonding were adopted. The hermeticity and bonding strength of the structure are evaluated. Preliminary results show that the hermeticity can meet the requirement of the criterion of MIL-STD 883E, method 1014.9, and the bonding strength is up to 8 MPa.

引用

页码：105 / 109

页数：4