Spice modeling of oxide and interface trapped charge effects in fully-depleted double-gate FinFETs

被引：0
作者：
Nebojsa Jankovic
Tatjana Pesic-Brdjanin
机构：
[1] University of Nis,Faculty of Electronic Engineering Nis
[2] University of Banja Luka,Faculty of Electrical Engineering
来源：
Journal of Computational Electronics | 2015年 / 14卷
关键词：
Double-gate FinFET; Trapped charge; Spice model ; Device aging; Circuit simulation;
D O I：
暂无
中图分类号：
学科分类号：
摘要：
As is the case with conventional planar MOS transistors, the electrical characteristics of highly-scaled multi-gate field-effect transistors (FinFETs) also suffer from temporal degradations occurring due to hot-carrier injection, bias temperature instability and/or ionizing-radiation damage. The FinFETs aging is caused by cumulative contribution of the generation of oxide/Si interface traps and positively charged defects within the gate oxide. The accurate capturing of the dynamic contribution of the both trapped charges by the FinFET electrical models in Spice simulations is important for lifetime prediction and verification of long-term performance of advanced CMOS ICs. In this paper, the auxiliary sub-circuit is described aimed for including the effects of oxide and interface trapped charges in Spice electrical models of fully-depleted double-gate FinFETs. The efficiency of the proposed sub-circuit for modeling the aging effects in double-gate FinFETs is verified using two-dimensional TCAD device simulations.
引用
收藏
页码：844 / 851
页数：7
相关论文
共 53 条
[1]  
Nowak Edward J(2004)Turning silicon on its edge [double gate CMOS/FinFET technology] IEEE Circuits Devices Mag. 20 20-31
[2]  
Aller I(2008)Investigation of reliability characteristics in NMOS and PMOS FinFETs IEEE Electron Device Lett. 29 788-790
[3]  
Ludwig T(2005)Hot carrier-induced degradation in bulk FinFETs IEEE Electron Device Lett. 26 566-568
[4]  
Keunwoo Kim(2011)Modeling of ionizing radiation-induced degradation in multiple gate field effect transistors IEEE Trans. Nucl. Sci. 58 499-505
[5]  
Joshi RV(2013)BSIM-SPICE models enable FinFET and UTB IC designs IEEE Access 1 201-215
[6]  
Chuang Ching-Te(2008)Approaching optimal characteristics of 10-nm high-performance devices: a quantum transport simulation study of Si FinFET IEEE Trans. Electron Devices 55 743-752
[7]  
Bernstein K(2009)Modeling ionizing radiation effects in solid state materials and CMOS devices IEEE Trans. Circuits Syst. I 56 1870-1883
[8]  
Puri R(1998)A continuous compact MOSFET model for fully- and partially depleted SOI devices IEEE Trans. Electron Devices 45 821-825
[9]  
Liao Wen-Shiang(2003)A unified I-V model for PD/FD SOI MOSFETs with a compact model for floating body effects Solid-State Electron. 47 1909-1915
[10]  
Liaw Yie-Gie(2005)Non-quasi-static physics-based circuit model of fully-depleted double-gate SOI MOSFET Solid-State Electron. 49 1086-1089
123456