Hybrid CMOS/memristor crossbar structure for implementing hopfield neural network

被引:0
作者
Mahdiyar Molahasani Majdabadi
Jafar Shamsi
Shahriar Baradaran Shokouhi
机构
[1] Iran University of Science and Technology,School of Electrical Engineering
来源
Analog Integrated Circuits and Signal Processing | 2021年 / 107卷
关键词
Hopfield neural network; Neural network hardware; Memristor crossbar array; Synaptic weights; Hybrid CMOS/memristor circuit;
D O I
暂无
中图分类号
学科分类号
摘要
Competent hardware implementation of artificial neural networks is still an important contest. In recent literature, memristor has been introduced as a promising candidate for synapses implementation. However, integrating a memristive circuit with neuron hardware is auspicious research with challenging issues. In this paper, a scalable circuit-level hybrid CMOS/memristor hardware is introduced for implementing a Hopfield neural network. The proposed circuit is fully compatible with the crossbar structure. The performance of the proposed hardware is evaluated for different scales and compared with its software-based counterpart. Moreover, the accuracy of large-scale hardware for Hopfield neural network with 45 neurons and 4320 memristors is evaluated. It is demonstrated that the performance of the circuit is in the line of the software simulation. In comparison with similar works, the proposed circuit consumes 2000 times less energy and retrieves patterns 130 times faster. The implemented circuit is a step toward a general and feasible memristive hardware implementation for recurrent neural networks.
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页码:249 / 261
页数:12
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