High Speed Residue to Binary Converter for the New Four-Moduli Set {22n, 2n + 1, 2n/2 + 1, 2n/2−1}

被引：0
作者：
M. R. Noorimehr
M. Hosseinzadeh
R. Farshidi
机构：
[1] Islamic Azad University,Department of Computer and Electrical Engineering, Science and Research Branch
[2] Islamic Azad University of Dezful,Department of Computer Engineering
来源：
Arabian Journal for Science and Engineering | 2014年 / 39卷
关键词：
Residue number system (RNS); Reverse converter; New Chinese remainder theorem 1 (CRT-I); Computer arithmetic;
D O I：
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中图分类号：
学科分类号：
摘要：
The performance of a residue number system (RNS) depends on speed of internal RNS arithmetic unit as well as speed and complexity of residue to binary converter. In this paper, the new four-moduli set {22n, 2n + 1, 2n/2 + 1, 2n/2−1} for even n is introduced and a high speed and low cost residue to binary converter is designed for it based on New Chinese Remainder Theorem 1. This converter has lower delay and hardware cost in comparison to the represented residue to binary converters for similar moduli sets. Furthermore, this moduli set offers increased execution speed in arithmetic unit because of using fast adders for implementing the arithmetic circuits.
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页码：2887 / 2893
页数：6
相关论文
共 34 条
  • [1] Conway R.(2004)RNS FIR filter architectures IEEE Trans. Circuits Syst. II Exp. Briefs 51 26-28
  • [2] Nelson J.(2007)Improved state-space criterion for global asymptotic stability of fixed-point state-space digital filters with saturation arithmetic Arab. J. Sci. Eng. 32 317-326
  • [3] Singh V.(1985)Fast memory-less over 64 bit, residue to binary converter IEEE Trans. Circuits syst. 32 298-300
  • [4] Bernardson P.(1988)A new efficient memory-less residue to binary converter IEEE Trans. Circuits syst. 35 1441-1444
  • [5] Andraros S.(1998)Comments on “A high speed realisation of a residue to binary number system converter” IEEE Trans. Circuits Syst. II Exp. Briefs, 45 446-447
  • [6] Ahmad H.(2000)A high-speed residue-to-binary converter and a scheme of its VLSI implementation IEEE Trans. Circuits Syst. II Analog. Digit. Signal Process. 47 1576-1581
  • [7] Dhurkadas A.(1998)Residue to binary arithmetic converter for the moduli set (2 IEEE Trans. Circuits Syst. II Exp. Briefs 45 204-209
  • [8] Wang W.(2011), 2 J. Autom. Syst. Eng. 5–4 165-175
  • [9] Swamy M.N.S.(2000), 2 IEEE Trans. Circuits Syst. II Analog. Digit. Signal Process. 47 197-205
  • [10] Ahmad M.O.(1994)−1) IEEE Trans. Comput. 423 68-77
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